1. Field of the Invention
The present invention relates to a semiconductor memory device having an error detecting and correcting function and a method of correcting errors in the semiconductor memory device.
2. Description of the Related Art
An error correcting mechanism has been used in a semiconductor memory device as a means to avoid data losses and thereby improve the reliability of the device. For example, JP-A 2008-16092 (KOKAI) discloses a structure in which an error correcting mechanism is arranged separately from a COL address decoder of a semiconductor memory device to correct errors in data that is output from the COL address decoder to the outside.
Volatile memories such as a DRAM, which lose accumulated electrical charge with time, need to perform refresh at regular time intervals to avoid loss of accumulated data. On the other hand, in nonvolatile memories such as an MRAM, loss of accumulated data does not depend on the passage of time, but the loss occurs when a reading or writing operation is executed onto memory cells of the nonvolatile memory. Thus, error detection and correction has to be performed when an access is made to the memory cells.
In the structure as disclosed in JP-A 2008-16092, however, in which an error correcting mechanism is arranged outside the COL address decoder, error correction is performed onto data output from the COL address decoder only, out of the data read from the memory cell array. In other words, because only part of the data that is read from the memory cells is subjected to the error correction, it is difficult to correct errors in any data other than the data output from the COL address decoder when an error is detected in such data.